Designing Azure silicon on Azure silicon: EDA workloads on Cobalt 200

Microsoft’s Azure Cobalt 200, built on Arm Neoverse CSS V3, has been evaluated for running electronic design automation (EDA) workloads that previously relied on fixed on-premise x86 servers. These workloads include simulation sweeps lasting days, verification regressions spanning thousands of cores, and memory-intensive physical signoff runs. By shifting to cloud-based EDA on Azure, engineering teams gain flexibility and scale while maintaining reliability for compute-heavy silicon design tasks.

Cobalt 200’s architecture combines physical cores without hyperthreading, 3MB L2 cache per core, and high memory bandwidth to support concurrent EDA workloads. Tests across Microsoft’s silicon development flow—including RTL simulation, static timing, and physical verification—showed performance gains over Cobalt 100 and selected x86 Azure VMs. Workloads from Cadence, Synopsys, and Siemens were executed unmodified, focusing performance testing rather than functionality changes.

Cadence Xcelium and Synopsys VCS simulations on Cobalt 200 delivered over 40% higher throughput per logical core than other systems tested, while Cadence Spectre analog simulations showed 38% higher throughput generation-over-generation. Siemens Calibre physical verification completed 23% faster than Cobalt 100, and Synopsys PrimeTime static timing analysis achieved 2x peak throughput per logical core compared to Cobalt 100.

Microsoft and EDA partners are expanding workload coverage and validating results as Cobalt 200 approaches general availability. Existing Arm-enabled tools ran without modification, and early tests indicate competitive performance against x86 Azure VMs. The company invites semiconductor teams to evaluate EDA workflows on Cobalt 200 VMs to assess potential performance gains for their design environments.